XRT79L71 Datasheet, PDF (111/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
BIT
NUMBER
NAME
0
Change of DMO
Condition Interrupt
Enable
TYPE
R/W
DEFAULT
VALUE
0
DESCRIPTION
Change of Transmit DMO (Drive Monitor Output) Condi-
tion Interrupt Enable:
This READ/WRITE bit-field permits the user to either
enable or disable the "Change of Transmit DMO Condition"
Interrupt. If the user enables this interrupt, then the
XRT79L71 device will generate an interrupt any time any of
the following events occur.
• Whenever the Transmit Section toggles the DMO output
pin (or bit-field) to "1".
• Whenever the Transmit Section toggles the DMO output
pin (or bit-field) to "0".
0 - Disables the "Change in the DMO Condition" Interrupt.
1 - Enables the "Change in the DMO Condition" Interrupt.
LIU INTERRUPT STATUS REGISTER (ADDRESS = 0X1302)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Unused
Change of
FL
Condition
Interrupt
Status
R/O
R/O
R/O
R/O
RUR
0
0
0
0
0
BIT 2
Change of
LOL
Condition
Interrupt
Status
RUR
0
BIT 1
Change of
LOS
Condition
Interrupt
Status
RUR
0
BIT 0
Change of
DMO
Condition
Interrupt
Status
RUR
0
BIT
NUMBER
NAME
7 - 4 Unused
3
Change of FL
Condition Interrupt
Status
TYPE
R/O
RUR
DEFAULT
VALUE
0
0
DESCRIPTION
Change of FL (FIFO Limit Alarm) Condition Interrupt
Status:
This RESET-upon-READ bit-field indicates whether or not
the "Change of FL Condition" Interrupt has occurred since
the last read of this register.
0 - Indicates that the "Change of FL Condition" Interrupt has
NOT occurred since the last read of this register.
1 - Indicates that the "Change of FL Condition" Interrupt has
occurred since the last read of this register.
NOTE:
The user can determine the current state of the
"FIFO Alarm condition" by reading out the contents
of Bit 3 (FL Alarm Declared) within the "Alarm
Status Register".
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