XRT79L71 Datasheet, PDF (246/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
PRELIMINARY
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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
ONE SECOND - PARITY ERROR ACCUMULATOR REGISTER - LSB (DIRECT ADDRESS = 0X1171)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
One_Second_Parity_Error_Accum_LSB[7:0]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
One_Second_Parity
Error Accum_LSB[7:0]
TYPE
R/O
DESCRIPTION
One Second Parity Error Accumulator Register - LSB:
These READ-ONLY bits, along with that within the "One Second
Parity Error Accumulator Register - MSB" combine to reflect the
cumulative number of "Parity Errors" that have been detected by
the Frame Synchronizer block, in the last "one second" accumu-
lation period. This register contains the Least Significant byte of
this 16-bit expression.
NOTES:
1. For DS3 applications, the register will reflect the
number of P-bit errors, detected within the last "one
second" accumulation period.
2. For E3, ITU-T G.751 applications, this register will
reflect the number of BIP-4 errors, detected within the
last "one second" accumulation period..
3. For E3, ITU-T G.832 applications, this register will
reflect the number of BIP-8 (B1 Byte) errors detected
within the last "one second" accumulation period.
ONE SECOND - CP BIT ERROR ACCUMULATOR REGISTER - MSB (DIRECT ADDRESS = 0X1172)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
One_Second_CP_Bit_Error_Accum_MSB[7:0]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
One_Second_CP Bit
Error Accum_MSB[7:0]
TYPE
R/O
DESCRIPTION
One Second CP Bit Error Accumulator Register - MSB:
These READ-ONLY bits, along with that within the "One Second
CP-Bit Error Accumulator Register - LSB" combine to reflect the
cumulative number of "CP Bit Errors" that have been detected by
the Frame Synchronizer block, in the last "one second" accumu-
lation period.
This register contains the Most Significant byte of this 16-bit
expression.
NOTE: This register is inactive if the Frame Synchronizer block is
"by-passed" or if the Frame Synchronizer block has not
been configured to operate in the DS3, C-Bit Parity
framing format.
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