XRT79L71 Datasheet, PDF (357/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT ATM CONTROL REGISTER - BYTE 1
(ADDRESS = 0X1F02)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Test Cell ONE SHOT GFC Inser- GFC Inser- GFC Inser- GFC Inser- COSET Poly- Regenerate
Transmit
MODE tion Enable - tion Enable - tion Enable - tion Enable - nomial Addi- HEC Byte
Mode Enable
Bit 3 (MSB)
Bit 2
Bit 1
Bit 0 (LSB)
tion
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7
Test Cell Transmit Mode
Enable
6
One Shot Mode
5
GFC Insertion Enable -
Bit 3
TYPE
DESCRIPTION
R/W Test Cell Transmit Mode Enable:
This READ/WRITE bit-field permits the user to enable the Test Cell
Transmitter (within the Transmit ATM Cell Processor Block). The
user must implement this configuration option in order to perform
diagnostic operations with Test Cells.
0 - Disables the Test Cell Transmitter.
1 - Enables the Test Cell Transmitter.
NOTE: For normal operation, the user should set this bit-field to "1".
R/W One Shot Mode:
If the user has enabled the Test Cell Transmitter, then this READ/
WRITE bit-field permits the user to either configure the Test Cell
Transmitter into the "One-Shot" or in the "Continuous" Mode.
If the user configures the Test Cell Transmitter into the "One-Shot"
Mode, then (whenever the user implements a "0 to 1" transition
within Bit 7 [Test Cell Transmit Mode Enable] of this register) then the
Test Cell Transmitter will generate and transmit 1024 test cells.
Afterwards, the Test Cell Transmitter will halt its transmission of Test
Cells until the user implements another "0 to 1 transition" within Bit 7
(Test Cell Transmit Mode Enable) within this register.
If the user configures the Test Cell Transmitter into the "Continuous"
Mode, then the Test Cell Transmitter will continuously generate and
transmit test cells for the duration that Bit 7(Test Cell Transmit Mode
Enable) is set to "1".
0 - Configures the Test Cell Transmitter to operate in the "Continu-
ous" Mode.
1 - Configures the "Test Cell Transmitter" to operate in the "One-
Shot" Mode.
R/W GFC Insertion Enable - Bit 3 (MSB):
This READ/WRITE bit-field along with GFC Insertion Enable - Bits 2
through 0 permit the user to select the bits (within the GFC nibble of
each "outbound" ATM cell) that will be modified by the contents that
is applied via the "Transmit GFC Serial Input" port, as described
below.
0 - Configures the Transmit GFC Serial Input" port to NOT modify the
contents of Bit 3 (the most significant bit) within the GFC nibble.
1 - Configures the Transmit GFC Serial Input" port to modify the con-
tents of Bit 3 (within the GFC nibble) with the value that is applied via
the Transmit GFC Serial Input Port.
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