XRT79L71 Datasheet, PDF (122/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
BIT
NUMBER
NAME
1
JA in Tx Path Ch
0
JA0 Ch
PRELIMINARY
áç
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
TYPE
R/W
R/W
DEFAULT
VALUE
0
0
DESCRIPTION
Jitter Attenuator in Transmit/Receive Path Select Bit:
This input pin permits the user to configure the Jitter Attenu-
ator (within the XRT79L71 device) to operate in either the
Transmit or Receive path, as described below.
0 - Configures the Jitter Attenuator (within the XRT79L71
device) to operate in the Receive Path.
1 - Configures the Jitter Attenuator (within the XRT79L71
device) to operate in the Transmit Path.
Jitter Attenuator Configuration Select Input - Bit 0:
Please see the description for Bit 2 (JA1) within this Regis-
ter.
LIU RECEIVE APS/REDUNDANCY CONTROL REGISTER (ADDRESS = 0X1308)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Unused
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
BIT 0
RxON
R/W
0
BIT
NUMBER
NAME
7 - 1 Reserved
0
RxON
TYPE
R/O
R/W
DEFAULT
VALUE
0
0
DESCRIPTION
Receiver Section ON - XRT79L71:
This READ/WRITE bit-field permits the user to either turn
on or turn off the Receive Section of XRT79L71. If the user
turns on the Receive Section, then XRT79L71 will begin to
receive the incoming DS3 or E3 data-stream via the RTIP
and RRING input pins.
Conversely, if the user turns off the Receive Section, then
the entire Receive Section (e.g., AGC and Receive Equal-
izer Block, Clock Recovery PLL, etc) will be powered down.
0 - Shuts off the Receive Section of XRT79L71.
1 - Turns on the Receive Section of XRT79L71.
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