XRT79L71 Datasheet, PDF (303/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
RECEIVE ATM CELL PROCESSOR BLOCK - RECEIVE USER CELL FILTER # 0 - CHECK REGISTER -
BYTE 2 (ADDRESS = 0X1749)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive User Cell Filter # 0 - Check Register - Byte 2 [7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
TYPE
DESCRIPTION
7-0
Receive User Cell Filter #
0 - Check Register -
Header Byte 2
R/W Receive User Cell Filter # 0 - Check Register - Header Byte 2:
The User Cell filtering criteria (for Receive User Cell Filter # 0) is
defined based upon the contents of 9 read/write registers. These
registers are the four "Receive ATM Cell Processor Block - Receive
User Cell Filter # 0 - Pattern Registers", the four "Receive ATM Cell
Processor Block - Receive User Cell Filter # 0 - Check Registers"
and the "Receive ATM Cell Processor Block - Receive User Cell Fil-
ter # 0 Control Register.
This READ/WRITE register, along with the "Receive ATM Cell Pro-
cessor Block - Receive User Cell Filter # 0 - Pattern Register -
Header Byte 2" permits the user to define the User Cell Filtering cri-
teria for "Octet # 2" within the incoming User Cell. More specifically,
these READ/WRITE register bits permit the user to specify which
bit(s) in "Octet 2" of the incoming user cell (in the Receive ATM Cell
Processor Block) are to be checked against the corresponding bit-
fields within the "Receive ATM Cell Processor Block - Receive User
Cell Filter # 0 - Pattern Register - Header Byte 2" by the User Cell
Filter, when determine whether to "filter" a given User Cell.
Writing a "1" to a particular bit-field in this register, forces the
Receive User Cell Filter to check and compare the corresponding bit
in "Octet # 2" (of the incoming user cell) with the corresponding bit in
the "Receive ATM Cell Processor Block - Receive User Cell Filter # 0
- Pattern Register - Header Byte 2".
Writing a "0" to a particular bit-field in this register causes the
Receive User Cell Filter to treat the corresponding bit within "Octet #
2" (in the incoming user cell) as a "don't care" (e.g., to forgo the com-
parison between the corresponding bit in "Octet # 2" of the incoming
user cell with the corresponding bit-field in the "Receive ATM Cell
Processor Block - Receive User Cell Filter # 0 - Pattern Register -
Header Byte 2").
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