XRT79L71 Datasheet, PDF (387/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT USER CELL FILTER # 0 - PATTERN
REGISTER - HEADER BYTE 1 (ADDRESS = 0X1F44)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit User Cell Filter # 0 - Pattern Register - Byte 1 [7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
TYPE
DESCRIPTION
7-0
Transmit User Cell Fil- R/W Transmit User Cell Filter # 0 - Pattern Register - Header Byte 1:
ter # 0 - Pattern Regis-
ter - Header Byte 1
The User Cell filtering criteria (for Transmit User Cell Filter # 0) is
defined based upon the contents of 9 read/write registers. These reg-
isters are the four "Transmit ATM Cell Processor Block - Transmit User
Cell Filter # 0 - Pattern Registers", the four "Transmit ATM Cell Proces-
sor Block - Transmit User Cell Filter # 0 - Check Registers" and the
"Transmit ATM Cell Processor Block - Transmit User Cell Filter # 0
Control Register.
This READ/WRITE register, along with the "Transmit ATM Cell Proces-
sor Block - Transmit User Cell Filter # 0 - Check Register - Header
Byte 1" permits the user to define the User Cell Filtering criteria for
"Octet # 1" of the incoming User Cell.
The user will write the header byte pattern (for Octet 1) that he/she
wishes to use as part of the "User Cell Filtering" criteria, into this reg-
ister. The user will also write in a value into the "Transmit ATM Cell
Processor Block - Transmit User Cell Filter # 0 - Check Register -
Header Byte 1" that indicates which bits within the first octet of the
incoming cells are to be compared with the contents of this register.
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