XRT79L71 Datasheet, PDF (322/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
PRELIMINARY
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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
RECEIVE ATM CELL PROCESSOR BLOCK - RECEIVE USER CELL FILTER # 1 - FILTERED CELL
COUNT - BYTE 0 (ADDRESS = 0X175F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
User Cell Filter # 1 - Filtered Cell Count[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
User Cell Filter # 1 - Fil-
tered Cell Count[7:0]
TYPE
RUR
DESCRIPTION
User Cell Filter # 1 - Filtered Cell Count[7:0]:
These RESET-upon-READ bit-fields, along with that in the
"Receive ATM Cell Processor Block - Receive User Cell Filter # 1
- Filtered Cell Count - Bytes 3" through "1" register contain a 32-
bit expression for the number of User Cells that have been fil-
tered by User Cell Filter # 1 since the last read of this register.
Depending upon the configuration settings within the "Receive
ATM Cell Processor Block - Receive User Cell Filter Control -
User Cell Filter # 1" Register (Address = 0x1753), these register
bits will be incremented anytime User Cell Filter # 1 performs
any of the following functions.
• Discards an incoming "User Cell".
• Copies (or Replicates) an incoming "User Cell" and routes the
"copy" to the Receive Cell Extraction Buffer.
• Both the above actions.
This particular register contains the LSB (Least Significant Byte)
value for this 32-bit expression.
NOTE:
If the number of "filtered cells" reaches the value
"0xFFFFFFFF" then these registers will saturate to and
remain at this value (e.g., it will not overflow to
"0x00000000").
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