XRT79L71 Datasheet, PDF (369/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT CELL INSERTION/EXTRACTION MEMORY
DATA - BYTE 2 (ADDRESS = 0X1F15)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit Cell Insertion/Extraction Memory Data[23:16]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
TYPE
DESCRIPTION
7-0
Transmit Cell Insertion/ R/W Transmit Cell Insertion/Extraction Memory Data[23:16]:
Extraction Memory
Data[23:16]
These READ/WRITE bit-fields, along with that in the "Transmit ATM
Cell Processor Block - Transmit Cell Insertion/Extraction Memory Data
- Bytes 3, 1 and 0" support the following functions.
a. They function as the address location for the user to write the
contents of an "outbound" ATM cell into the Transmit Cell
Insertion Memory, via the Microprocessor Interface.
b. They function as the address location, for which the user to read
out the contents of an "inbound" ATM cell from the Receive Cell
Extraction Memory, via the Microprocessor Interface.
NOTES:
1. If the user performs a WRITE operation to this (and the other
three address locations), then he/she is writing ATM cell data
into the Transmit Cell Insertion Memory.
2. If the user performs a READ operation to this (and the other
three address locations), then he/she is reading ATM cell
data from the Transmit Cell Extraction Memory.
3. READ and WRITE operations must be performed in a "32-
bit" (4-byte "word") manner. Hence, whenever the user
performs a READ/WRITE operation to these address
locations, he/she must start by writing in or reading out the
first byte (of this "4-byte" word) of a given ATM cell, into/from
the Transmit ATM Cell Processor Block - Transmit Cell
Insertion/Extraction Memory - Byte 3" register. Next, the
user must perform the READ/WRITE operation (with the
second of this "4-byte" word) to this particular address
location. Afterwards, the user must perform a READ/WRITE
operation (with the third of this "4-byte" word) to the Transmit
ATM Cell Processor Block - Transmit Cell Insertion/Extraction
Memory - Byte 1 register. Finally, the user must perform a
READ/WRITE operation (with the fourth of this "4-byte" word)
to the Transmit ATM Cell Processor Block - Transmit Cell
Insertion/Extraction Memory - Byte 0 register. When reading
out (writing in) the next four bytes of a given ATM Cell, the
user must repeat this process with a READ or WRITE
operation, from/to this register location, and so on.
4. Whenever the user is writing cell data into the Transmit Cell
Insertion Memory, the size of the Cell is always 56 bytes.
5. Whenever the user is reading cell data from the Transmit Cell
Extraction Memory, the size of the Cell is always 56 bytes.
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