EP7211 Datasheet, PDF (42/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
PE[1]
0
0
1
1
Table 3-5. Boot Options
PE[0]
0
1
0
1
Boot Block(NCS0)
32-bit
8-bit
16-bit
Undefined
3.5 EP7211 Boot ROM
The 128 bytes of on-chip Boot ROM contain a instruction sequence that initializes the device and
then configures UART1 to receive 2048 bytes of serial data that will then be placed in the on-chip
SRAM. Once the download is complete, execution jumps to the start of the on-chip SRAM. This
would allow, for example, code to be downloaded to program system Flash during a product’s
manufacturing process. See Section 10 Appendix A: Boot Code on page 157 for details of the ROM
Boot Code with comments to describe the stages of execution.
Selection of the Boot ROM option is determined by the state of the NMEDCHG pin during a power
on reset. If NMEDCHG is high while NPOR is active, then the EP7211 will boot from an external
memory device connected to CS0 (normal boot mode). If NMEDCHG is low, then the boot will be
from the on-chip ROM. Note that in both cases, following the de-assertion of power on reset, the
EP7211 will be in the Standby State and requires a low-to-high transition on the external WAKEUP
pin in order to actually start the boot sequence.
The effect of booting from the on-chip Boot ROM is to reverse the decoding for all chip selects
internally. Table 3-6 shows this decoding. The control signal for the boot option is latched by
NPOR, which means that the remapping of addresses and bus widths will continue to apply until
NPOR is asserted again. After booting from the Boot ROM, the contents of the Boot ROM can be
read back from address 0x00000000 onwards, and in normal state of operation the Boot ROM
contents can be read back from address range 0x70000000.
Table 3-6. Chip Select Address Ranges After Boot From On-Chip Boot ROM
Address Range
0000.0000–0FFF.FFFF
1000.0000–1FFF.FFFF
2000.0000–2FFF.FFFF
3000.0000–3FFF.FFFF
4000.0000–4FFF.FFFF
Chip Select
CS7 (Internal only)
CS6 (Internal only)
NCS5
NCS4
NCS3
42
Functional Description
DS352PP3
JUL 2001