EP7211 Datasheet, PDF (149/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
6.5 I/O Buffer Characteristics
All I/O buffers on the EP7211 are CMOS threshold input bidirectional buffers except the oscillator
and power pads. For signals that are nominally inputs, the output buffer is only enabled during pin
test mode. All output buffers are tristated during system (hi-Z) test mode. All buffers have a standard
CMOS threshold input stage (apart from the Schmitt triggered inputs) and CMOS slew rate
controlled output stages to reduce system noise. Table 6-4. I/O Buffer Output Characteristics
defines the I/O buffer output characteristics which will apply across the full range of temperature and
voltage (i.e., these values are for 3.3 V, +70°C).
Table 6-4. I/O Buffer Output Characteristics
Buffer Type
I/O strength 1
I/O strength 2
Drive
Current
±4 mA
±12 mA
Propagation
Delay (Max)
7
5
Rise Time
(Max)
14
6
Fall Time
(Max)
14
6
Load
50 pF
50 pF
All propagation delays are specified at 50% V_DD to 50% V_DD, all rise times are specified as 10%
V_DD to 90% V_DD and all fall times are specified as 90% V_DD to 10% V_DD.
DS352PP3
JUL 2001
149
Electrical Specifications