EP7211 Datasheet, PDF (32/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
Table 2-4. JTAG Pin Ordering for 208-Pin LQFP Package (cont.)
Pin
No.
Signal
Type
Position
Pin
No.
142
A[10]
Out
259
176
143
D[10]
I/O
261
177
144
A[9]
Out
264
178
145
D[9]
I/O
266
179
146
A[8]
Out
269
184
147
D[8]
I/O
271
185
148
A[7]
Out
274
186
150
D[7]
I/O
276
187
151
NBATCHG
In
279
188
152
NEXTPWR
In
280
189
153
BATOK
In
281
191
154
NPOR
In
282
192
155
NMEDCHG/
In
BROM
283
193
156
NURESET
In
284
194
161
WAKEUP
In
285
195
162
NPWRFL
In
286
196
163
A[6]
Out
287
199
164
D[6]
I/O
289
200
165
A[5]
Out
292
201
166
D[5]
I/O
294
202
169
A[4]
Out
297
204
170
D[4]
I/O
299
205
171
A[3]
Out
302
206
172
D[3]
I/O
304
207
173
A[2]
Out
307
208
175
D[2]
I/O
309
Signal
A[1]
D[1]
A[0]
D[0]
CL2
CL1
FRM
M
DD[3]
DD[2]
DD[1]
DD[0]
NRAS[1]
NRAS[0]
NCAS[3]
NCAS[2]
NCAS[1]
NCAS[0]
NMWE
NMOE
NCS[0]
NCS[1]
NCS[2]
NCS[3]
NCS[4]
Type
Out
I/O
Out
I/O
Out
Out
Out
Out
I/O
I/O
I/O
I/O
Out
Out
I/O
I/O
I/O
I/O
Out
Out
Out
Out
Out
Out
Out
Position
312
314
317
319
322
324
326
328
330
333
336
339
342
344
346
349
352
355
358
360
362
364
366
368
370
NOTE:
1)See Table 2-1. SSI/Codec/MCP Pin Multiplexing for pin naming/functionality.
2)For each pad, the JTAG connection ordering is input, output, then enable as applicable.
32
Pin Information
DS352PP3
JUL 2001