EP7211 Datasheet, PDF (103/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
5.6 LEDFLSH Register
ADDRESS: 0x8000.22C0
The LEDFLSH register is as follows:
6
5
Enable
Duty ratio
2
1
0
Flash rate
The output is enabled whenever LEDFLSH[6] = 1. When enabled, Port D’s Bit 0 Direction Register
needs to be configured as an output pin and the bit cleared to ‘0’. When the LED Flasher is disabled,
the pin defaults to being used as Port D Bit 0. Thus, this will ensure that the LED will be off when
disabled.
The flash rate is determined by the LEDFLSH[1:0] bits, in the following way:
LEDFLSH[5:2]
0000
0001
0010
0011
0100
0101
0110
0111
Table 5-7. LED Flash Rates
LEDFLSH[1:0]
00
01
10
11
Flash Period (sec)
1
2
3
4
Table 5-8. LED Duty Ratio
Duty Ratio
(mark:space)
01:15
02:14
03:13
04:12
05:11
06:10
07:09
08:08
LEDFLSH[5:2]
1000
1001
1010
1011
1100
1101
1110
1111
Duty Ratio
(mark:space)
09:07
10:06
11:05
12:04
13:03
14:02
15:01
16:00 (continually on)
DS352PP3
JUL 2001
103
Register Descriptions