EP7211 Datasheet, PDF (1/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
Preliminary Data Sheet
FEATURES
I Dynamically programmable clock speeds of
18, 36, 49, and 74 MHz at 2.5 V
I Performance matching 100-MHz Intel^
Pentium-based PC
I Socket and register compatible with CL-PS7111
I Ultra low power
— Designed for applications that require long battery life
while using standard AA/AAA batteries or rechargeable
cells
— 170 mW at 74 MHz in the Operating State
— 50 mW at 18 MHz in the Operating State
— 15 mW in the Idle State (clock to the CPU stopped,
everything else running)
— 10 µW in the Standby State (realtime clock ‘on’,
everything else stopped)
I LCD controller
— Interfaces directly to a single-scan panel monochrome
LCD
— Panel width size is programmable from 32 to 1024 pixels
in 16-pixel increments
— Video frame buffer size programmable up to 128 kbytes
— Bits per pixel programmable from 1, 2, or 4
(cont.)
High-Performance Ultra-Low-
Power System-on-Chip with
LCD Controller
OVERVIEW
The EP7211 is designed for ultra-low-power applica-
tions such as organizers/PDAs, two-way pagers,
smart cellular phones, and industrial hand-held infor-
mation appliances. The core-logic functionality of the
device is built around an ARM720T processor with 8
kbytes of four-way set-associative unified cache and
a write buffer. Incorporated into the ARM720T is an
enhanced memory management unit (MMU), which
allows for Microsoft Windows CE support.
The EP7211 also includes a 32-bit Y2K-compliant
Real Time Clock (RTC) and comparator.
(cont.)
Functional Block Diagram
13-MHZ INPUT
3.6864 MHZ
32.768 KHZ
POR, RUN,
RESET, WAKEUP
BATOK, EXTPWR
PWRFL, BATCHG
EINT[1–3], FIQ,
MEDCHG
FLASHING LED DRIVE
PORTS A, B, D (8-BIT)
PORT E (3-BIT)
KEYBD DRIVERS (0–7)
BUZZER DRIVE
DC-TO-DC
ADCCLK, ADCIN,
ADCOUT, SMPCLK,
ADCCS
SSICLK, SSITXFR,
SSITXDA, SSIRXDA,
SSIRSFR
PLL
32.768-KHZ
OSCILLATOR
STATE CONTROL
POWER
MANAGEMENT
INTERRUPT
CONTROLLER
RTC
GPIO
PWM
SSI1 (ADC)
MULTIMEDIA
CODEC PORT
SSI2
CODEC
ARM720T
ARM7TDMI
CPU CORE
8-KBYTE
CACHE
MMU
WRITE
BUFFER
TIMER
COUNTERS (2)
ON-CHIP
BOOT ROM
INTERNAL DATA BUS
MEMORY CONTROL BLOCK
CL-PS6700
INTFC.
EXPANSION
CONTROL
DRAM
CONTROLLER
INTERNAL ADDRESS BUS
LCD DMA
ICE-JTAG
LCD
CONTROLLER
ON-CHIP SRAM
37.5 KBYTES
IrDA
APB BRIDGE
EPB BUS
UART1
UART2
D0–D31
PB[0–1], CS[4–5]
EXPCLK, WORD,
CS[0–3], EXPRDY,
WRITE
MOE, MWE,
RAS[0–1], CAS[0–3]
A[0–27],
DRA[0–12]
TEST AND
DEVELOPMENT
LCD DRIVE
LED AND
PHOTODIODE
ASYNC
INTERFACE 1
ASYNC
INTERFACE 2
Cirrus Logic, Inc.
P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2001
(All Rights Reserved)
DS352PP3
JUL 2001
1