EP7211 Datasheet, PDF (140/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
EXPCLK
DRA[12:0]
NRAS[1:0]
NCAS[3:0]
D[31:0]
ROW
COL
W_5$6
W_5&
7
W₅₃
ROW
7
COL1 COL2 COLn
7 ^7
W_{&3 W3&}
W_&$6
1
2
n
NMOE
NMWE
WORD/
HALFWORD
WRITE
Figure 6-5. DRAM Read Cycles at 36 MHz
NOTES:
1) t_RC (read cycle time) = 150 ns max
2) t_RAS (RAS pulse width) = 70 ns max
3) t_RP (RAS precharge time) = 70 ns max
4) t_CAS (CAS pulse width) = 10 ns max
5) t_CP (CAS precharge in page mode) = 10 ns max
6) t_PC (Page mode cycle time) = 25 ns max
Word reads shown, for byte reads only one off NCAS[3:0] will be active, NCAS0 for byte 0, etc.
140
Electrical Specifications
DS352PP3
JUL 2001