DS925 Datasheet, PDF (94/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Table 120: GTY Transceiver User Clock Switching Characteristics⁽¹⁾
Symbol
Description
Data Width Conditions
(Bit)
Speed Grade and
V_CCINT Operating Voltages
0.90V
0.85
0.72
Units
Internal Interconnect
Logic
Logic
-3
-2
-1
-2
-1
F_TXOUTPMA
TXOUTCLK maximum frequency sourced
from OUTCLKPMA
511.719 511.719 390.625 511.719 322.266 MHz
F_RXOUTPMA
RXOUTCLK maximum frequency sourced
from OUTCLKPMA
511.719 511.719 390.625 511.719 322.266 MHz
F_TXOUTPROGDIV
TXOUTCLK maximum frequency sourced
from TXPROGDIVCLK
511.719 511.719 511.719 511.719 511.719 MHz
F_RXOUTPROGDIV
RXOUTCLK maximum frequency sourced
from RXPROGDIVCLK
511.719 511.719 511.719 511.719 511.719 MHz
16
16, 32
511.719 511.719 390.625 390.625 322.266 MHz
F_TXIN
TXUSRCLK
maximum
frequency
32
32, 64
511.719 511.719 390.625 390.625 322.266 MHz
64
64, 128
511.719 440.781 195.313 402.813 195.313 MHz
20
20, 40
409.375 409.375 312.500 312.500 312.500 MHz
40
40, 80
409.375 409.375 312.500 350.000 257.813 MHz
80
80, 160
409.375 352.625 156.250 352.625 156.250 MHz
16
16, 32
511.719 511.719 390.625 390.625 322.266 MHz
F_RXIN
RXUSRCLK
maximum
frequency
32
32, 64
511.719 511.719 390.625 390.625 322.266 MHz
64
64, 128
511.719 440.781 195.313 402.813 195.313 MHz
20
20, 40
409.375 409.375 312.500 312.500 312.500 MHz
40
40, 80
409.375 409.375 312.500 350.000 257.813 MHz
80
80, 160
409.375 352.625 156.250 352.625 156.250 MHz
16
16, 32
511.719 511.719 390.625 390.625 322.266 MHz
F_TXIN2
32
32, 64
511.719 511.719 390.625 390.625 322.266 MHz
TXUSRCLK2
64
64, 128
511.719 440.781 195.313 402.813 195.313 MHz
maximum
frequency
20
20, 40
409.375 409.375 312.500 312.500 312.500 MHz
40
40, 80
409.375 409.375 312.500 350.000 257.813 MHz
80
80, 160
409.375 352.625 156.250 352.625 156.250 MHz
16
16, 32
511.719 511.719 390.625 390.625 322.266 MHz
F_RXIN2
32
32, 64
511.719 511.719 390.625 390.625 322.266 MHz
RXUSRCLK2
64
64, 128
511.719 440.781 195.313 402.813 195.313 MHz
maximum
frequency
20
20, 40
409.375 409.375 312.500 312.500 312.500 MHz
40
40, 80
409.375 409.375 312.500 350.000 257.813 MHz
80
80, 160
409.375 352.625 156.250 352.625 156.250 MHz
Notes:
1. Clocking must be implemented as described in the UltraScale Architecture GTY Transceiver User Guide (UG578).
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
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