DS925 Datasheet, PDF (107/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Configuration Switching Characteristics
Table 137: Configuration Switching Characteristics
Symbol
Description
Speed Grade and
V_CCINT Operating Voltages
0.90V
0.85V
0.72V
-3
-2
-1
-2
-1
Internal Configuration Access Port
F_ICAPCK
Internal configuration access port
(ICAPE3)
200
200
200
175
175
DNA Port Switching
F_DNACK
DNA port frequency (DNA_PORT)
STARTUPE3 Ports
200
200
200
175
175
F_CFGMCLK
F_CFGMCLKTOL
STARTUPE3 CFGMCLK output frequency
STARTUPE3 CFGMCLK output frequency
tolerance
50.00
±15
50.00
±15
50.00
±15
50.00
±15
50.00
±15
T_{DCI_MATCH}
Specifies a stall in the startup cycle until
the digitally controlled impedance (DCI)
4
4
4
4
4
match signals are asserted.
Units
MHz, Max
MHz, Max
MHz, Typ
%, Max
ms, Max
eFUSE Programming Conditions
Table 138: eFUSE Programming Conditions⁽¹⁾
Symbol
Description
Min
Typ
Max
Units
I_PLFS
I_PSFS
t_j
PL V_CCAUX supply current.
PS V_{CC_PSAUX} supply current.
Temperature range.
–
–
115
mA
–
–
115
mA
–40
–
125
°C
Notes:
1. Do not program eFUSE during device configuration (e.g., during configuration, during configuration readback, or when
readback CRC is active).
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
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