DS925 Datasheet, PDF (53/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Table 74 provides the maximum data rates for applicable memory standards using the Zynq UltraScale+
MPSoC memory PHY. Refer to Memory Interfaces for the complete list of memory interface standards
supported and detailed specifications. The final performance of the memory interface is determined
through a complete design implemented in the Vivado Design Suite, following guidelines in the UltraScale
Architecture PCB Design Guide (UG583), electrical analysis, and characterization of the system.
Table 74: Maximum Physical Interface (PHY) Rate for Memory Interfaces
Memory
Standard
Package⁽¹⁾
DRAM Type
Speed Grade and V_CCINT Operating Voltages
0.90V
0.85V
0.72V
Units
-3
-2
-1
-2
-1
DDR4
Single rank component
All FFV packages 1 rank DIMM⁽²⁾⁽³⁾
and FBVB900 2 rank DIMM⁽²⁾⁽⁴⁾
4 rank DIMM⁽²⁾⁽⁵⁾
2666
2400
2133
1600
2666
2400
2133
1600
2400
2133
1866
1333
2400
2133
1866
1333
2133
1866
1600
N/A
Mb/s
Mb/s
Mb/s
Mb/s
Single rank component
2400
2400
2133
2133
1866 Mb/s
SFVC784
1 rank DIMM⁽²⁾⁽³⁾
2133
2133
1866
1866
1600 Mb/s
2 rank DIMM⁽²⁾⁽⁴⁾
1866
1866
1600
1600
1333 Mb/s
Single rank component
2133
2133
2133
2133
1866 Mb/s
DDR3
All FFV packages ^{1 rank DIMM(2)(3)}
and FBVB900 _{2 rank DIMM}(2)(4)
4 rank DIMM⁽²⁾⁽⁵⁾
Single rank component
1866
1600
1066
1866
1866
1600
1066
1866
1866
1600
1066
1866
1866
1600
1066
1866
1600
1333
800
1600
Mb/s
Mb/s
Mb/s
Mb/s
SFVC784
1 rank DIMM⁽²⁾⁽³⁾
2 rank DIMM⁽²⁾⁽⁴⁾
1600
1333
1600
1333
1600
1333
1600
1333
1333
1066
Mb/s
Mb/s
4 rank DIMM⁽²⁾⁽⁵⁾
800
800
800
800
606
Mb/s
All FFV packages
and FBVB900
Single rank component
1 rank DIMM⁽²⁾⁽³⁾
2 rank DIMM⁽²⁾⁽⁴⁾
1866
1600
1333
1866
1600
1333
1866
1600
1333
1866
1600
1333
1600
1333
1066
Mb/s
Mb/s
Mb/s
DDR3L
4 rank DIMM⁽²⁾⁽⁵⁾
Single rank component
800
1600
800
1600
800
1600
800
1600
606
1600
Mb/s
Mb/s
SFVC784
1 rank DIMM⁽²⁾⁽³⁾
2 rank DIMM⁽²⁾⁽⁴⁾
4 rank DIMM⁽²⁾⁽⁵⁾
1333
1066
606
1333
1066
606
1333
1066
606
1333
1066
606
1333
1066
606
Mb/s
Mb/s
Mb/s
QDR II+
All
Single rank component⁽⁶⁾ 633
633
600
600
550
MHz
RLDRAM 3
All FFV packages
and FBVB900
Single rank component
SFVC784
Single rank component
1200
1066
1200
1066
1066
933
1066
933
933
MHz
800
MHz
QDR IV XP
All
Single rank component⁽⁷⁾ 1066
1066
1066
933
933
MHz
LPDDR3
All
Single rank component
1600
1600
1600
1600
1600 Mb/s
Notes:
1. The SBVA484 and SFVA625 packages do not support the PL memory interfaces.
2. Dual in-line memory module (DIMM) includes RDIMM, SODIMM, UDIMM, and LRDIMM.
3. Includes: 1 rank 1 slot, DDP 2 rank, LRDIMM 2 or 4 rank 1 slot.
4. Includes: 2 rank 1 slot, 1 rank 2 slot, LRDIMM 2 rank 2 slot.
5. Includes: 2 rank 2 slot, 4 rank 1 slot.
6. The QDRII+ performance specifications are for burst-length 4 (BL = 4) implementations.
7. This memory interface is not production qualified and specification is subject to change.
DS925 (v1.1) June 20, 2016
Advance Product Specification
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