DS925 Datasheet, PDF (42/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
PS I2C Controller Interface
Table 49: I2C Interface⁽¹⁾
Symbol
Description
Min
Max
Units
I2C Fast-mode Interface
T_I2CFCKL
SCL Low time.
T_I2CFCKH
SCL High time.
T_I2CFCKO
SDA clock to out delay.
T_I2CFDCK
SDA input setup time.
F_I2CFCLK
SCL clock frequency.
I2C Standard-mode Interface
1.3
–
µs
0.6
–
µs
–
900
ns
100
–
ns
–
400
KHz
T_I2CSCKL
T_I2CSCKH
T_I2CSCKO
T_I2CSDCK
F_I2CSCLK
SCL Low time.
SCL High time.
SDA clock to out delay.
SDA input setup time.
SCL clock frequency.
4.7
–
µS
4.0
–
µS
–
3450
ns
250
–
ns
–
100
KHz
Notes:
1. The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a
15 pF load.
X-Ref Target - Figure 10
SCL
SDAI
SDAO
T_I2CFDCK
T_I2CFCKO
Figure 10: I2C Fast Mode Interface Timing
ds925_I2CF_071915
X-Ref Target - Figure 11
SCL
SDAI
SDAO
T_I2CSDCK
T_I2CSCKO
Figure 11: I2C Standard Mode Interface Timing
ds925_I2CS_071915
DS925 (v1.1) June 20, 2016
Advance Product Specification
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