DS925 Datasheet, PDF (58/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Table 76: IOB High Performance (HP) Switching Characteristics (Cont’d)
I/O Standards
T_{INBUF_DELAY_PAD_I}
0.90V 0.85V
0.72V
T_{OUTBUF_DELAY_O_PAD}
0.90V 0.85V
0.72V
T_{OUTBUF_DELAY_TD_PAD}
0.90V 0.85V
0.72V
Units
-3 -2 -1 -2 -1 -3 -2 -1 -2 -1 -3 -2 -1 -2 -1
DIFF_SSTL12_S
0.277 0.335 0.342 0.335 0.321 0.789 0.844 0.899 0.844 0.835 0.789 0.844 0.899 0.844 0.835 ns
DIFF_SSTL135_DCI_F 0.278 0.312 0.339 0.312 0.319 0.426 0.420 0.439 0.422 0.414 0.426 0.420 0.439 0.422 0.414 ns
DIFF_SSTL135_DCI_M 0.278 0.312 0.339 0.312 0.319 0.586 0.630 0.666 0.630 0.626 0.586 0.630 0.666 0.630 0.626 ns
DIFF_SSTL135_DCI_S 0.278 0.312 0.339 0.312 0.319 0.814 0.902 0.966 0.895 0.896 0.814 0.902 0.966 0.895 0.896 ns
DIFF_SSTL135_F
0.289 0.313 0.336 0.313 0.315 0.397 0.392 0.412 0.394 0.385 0.397 0.392 0.412 0.394 0.385 ns
DIFF_SSTL135_M
0.289 0.313 0.336 0.313 0.315 0.565 0.599 0.633 0.598 0.593 0.565 0.599 0.633 0.598 0.593 ns
DIFF_SSTL135_S
0.289 0.313 0.336 0.313 0.315 0.789 0.850 0.907 0.849 0.841 0.789 0.850 0.907 0.849 0.841 ns
DIFF_SSTL15_DCI_F
0.294 0.313 0.330 0.313 0.320 0.424 0.421 0.439 0.423 0.422 0.424 0.421 0.439 0.423 0.422 ns
DIFF_SSTL15_DCI_M 0.294 0.313 0.330 0.313 0.320 0.591 0.632 0.667 0.632 0.627 0.591 0.632 0.667 0.632 0.627 ns
DIFF_SSTL15_DCI_S
0.294 0.313 0.330 0.313 0.320 0.816 0.906 0.971 0.906 0.898 0.816 0.906 0.971 0.906 0.898 ns
DIFF_SSTL15_F
0.295 0.330 0.341 0.330 0.320 0.393 0.392 0.412 0.392 0.386 0.393 0.392 0.412 0.392 0.386 ns
DIFF_SSTL15_M
0.295 0.330 0.341 0.330 0.320 0.564 0.598 0.633 0.598 0.592 0.564 0.598 0.633 0.598 0.592 ns
DIFF_SSTL15_S
0.295 0.330 0.341 0.330 0.320 0.790 0.853 0.910 0.850 0.844 0.790 0.853 0.910 0.850 0.844 ns
DIFF_SSTL18_I_DCI_F 0.284 0.314 0.331 0.314 0.331 0.418 0.425 0.440 0.424 0.416 0.418 0.425 0.440 0.424 0.416 ns
DIFF_SSTL18_I_DCI_M 0.284 0.314 0.331 0.314 0.331 0.593 0.633 0.670 0.634 0.629 0.593 0.633 0.670 0.634 0.629 ns
DIFF_SSTL18_I_DCI_S 0.284 0.314 0.331 0.314 0.331 0.821 0.910 0.978 0.911 0.903 0.821 0.910 0.978 0.911 0.903 ns
DIFF_SSTL18_I_F
0.285 0.314 0.334 0.314 0.328 0.388 0.395 0.415 0.392 0.387 0.388 0.395 0.415 0.392 0.387 ns
DIFF_SSTL18_I_M
0.285 0.314 0.334 0.314 0.328 0.567 0.603 0.638 0.603 0.596 0.567 0.603 0.638 0.603 0.596 ns
DIFF_SSTL18_I_S
0.285 0.314 0.334 0.314 0.328 0.794 0.861 0.920 0.860 0.851 0.794 0.861 0.920 0.860 0.851 ns
HSLVDCI_15_F
0.343 0.364 0.384 0.364 0.360 0.424 0.422 0.440 0.421 0.418 0.424 0.422 0.440 0.421 0.418 ns
HSLVDCI_15_M
0.343 0.364 0.384 0.364 0.360 0.424 0.420 0.441 0.424 0.413 0.424 0.420 0.441 0.424 0.413 ns
HSLVDCI_15_S
0.343 0.364 0.384 0.364 0.360 0.424 0.421 0.440 0.421 0.417 0.424 0.421 0.440 0.421 0.417 ns
HSLVDCI_18_F
0.343 0.365 0.386 0.365 0.361 0.420 0.425 0.440 0.424 0.416 0.420 0.425 0.440 0.424 0.416 ns
HSLVDCI_18_M
0.343 0.365 0.386 0.365 0.361 0.423 0.424 0.440 0.423 0.418 0.423 0.424 0.440 0.423 0.418 ns
HSLVDCI_18_S
0.343 0.365 0.386 0.365 0.361 0.420 0.423 0.443 0.425 0.414 0.420 0.423 0.443 0.425 0.414 ns
HSTL_I_12_F
0.342 0.363 0.384 0.363 0.360 0.402 0.396 0.414 0.396 0.383 0.402 0.396 0.414 0.396 0.383 ns
HSTL_I_12_M
0.342 0.363 0.384 0.363 0.360 0.402 0.395 0.414 0.395 0.383 0.402 0.395 0.414 0.395 0.383 ns
HSTL_I_12_S
0.342 0.363 0.384 0.363 0.360 0.402 0.396 0.414 0.396 0.383 0.402 0.396 0.414 0.396 0.383 ns
HSTL_I_18_F
0.343 0.365 0.386 0.365 0.361 0.388 0.396 0.413 0.396 0.388 0.388 0.396 0.413 0.396 0.388 ns
HSTL_I_18_M
0.343 0.365 0.386 0.365 0.361 0.388 0.393 0.413 0.393 0.389 0.388 0.393 0.413 0.393 0.389 ns
HSTL_I_18_S
0.343 0.365 0.386 0.365 0.361 0.388 0.394 0.413 0.391 0.387 0.388 0.394 0.413 0.391 0.387 ns
HSTL_I_DCI_12_F
0.342 0.363 0.384 0.363 0.360 0.422 0.420 0.444 0.421 0.414 0.422 0.420 0.444 0.421 0.414 ns
HSTL_I_DCI_12_M
0.342 0.363 0.384 0.363 0.360 0.422 0.420 0.444 0.422 0.412 0.422 0.420 0.444 0.422 0.412 ns
HSTL_I_DCI_12_S
0.342 0.363 0.384 0.363 0.360 0.422 0.421 0.442 0.421 0.412 0.422 0.421 0.442 0.421 0.412 ns
HSTL_I_DCI_18_F
0.343 0.365 0.386 0.365 0.361 0.418 0.425 0.440 0.424 0.417 0.418 0.425 0.440 0.424 0.417 ns
HSTL_I_DCI_18_M
0.343 0.365 0.386 0.365 0.361 0.418 0.424 0.443 0.423 0.416 0.418 0.424 0.443 0.423 0.416 ns
HSTL_I_DCI_18_S
0.343 0.365 0.386 0.365 0.361 0.418 0.424 0.443 0.424 0.417 0.418 0.424 0.443 0.424 0.417 ns
HSTL_I_DCI_F
0.343 0.364 0.384 0.364 0.360 0.420 0.423 0.438 0.421 0.415 0.420 0.423 0.438 0.421 0.415 ns
HSTL_I_DCI_M
0.343 0.364 0.384 0.364 0.360 0.420 0.423 0.440 0.423 0.416 0.420 0.423 0.440 0.423 0.416 ns
HSTL_I_DCI_S
0.343 0.364 0.384 0.364 0.360 0.420 0.421 0.440 0.417 0.414 0.420 0.421 0.440 0.417 0.414 ns
HSTL_I_F
0.342 0.363 0.384 0.363 0.360 0.393 0.391 0.411 0.394 0.385 0.393 0.391 0.411 0.394 0.385 ns
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
Send Feedback
58