DS925 Datasheet, PDF (76/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Package Parameter Guidelines
The parameters in this section provide the necessary values for calculating timing budgets for clock
transmitter and receiver data-valid windows.
Table 93: Package Skew
Symbol
Description
PKGSKEW
Package Skew
Device
XCZU2EG
XCZU3EG
XCZU4EV
XCZU5EV
XCZU6EG
XCZU7EV
XCZU9EG
XCZU11EG
XCZU15EG
XCZU17EG
XCZU19EG
Package
SBVA484
SFVA625
SFVC784
SBVA484
SFVA625
SFVC784
SFVC784
FBVB900
SFVC784
FBVB900
FFVC900
FFVB1156
FBVB900
FFVC1156
FFVC1517
FFVC900
FFVB1156
FFVC1156
FFVB1517
FFVF1517
FFVC1760
FFVC900
FFVB1156
FFVB1517
FFVC1760
FFVD1760
FFVE1924
FFVB1517
FFVC1760
FFVD1760
FFVE1924
Value
108
108
119
134
119
134
132
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Notes:
1. These values represent the worst-case skew between any two SelectIO resources in the package: shortest delay to longest
delay from die pad to ball.
2. Package delay information is available for these device/package combinations. This information can be used to deskew the
package.
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
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