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DS925 Datasheet, PDF (78/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
X-Ref Target - Figure 19
+V
P
N
0
X-Ref Target - Figure 20
+V
Figure 19: Single-Ended Peak-to-Peak Voltage
Single-Ended
Peak-to-Peak
Voltage
ds925_single_peak_092115
Differential
0
Peak-to-Peak
Voltage
–V
P–N
Differential peak-to-peak voltage = (Single-ended peak-to-peak voltage) x 2
Figure 20: Differential Peak-to-Peak Voltage
ds925_diff_peak_092115
Table 95 and Table 96 summarize the DC specifications of the GTH transceivers input and output clocks in
Zynq UltraScale+ MPSoC. Consult the UltraScale Architecture GTH Transceiver User Guide (UG576) for
further details.
Table 95: GTH Transceiver Clock DC Input Level Specification
Symbol
DC Parameter
VIDIFF
RIN
CEXT
Differential peak-to-peak input voltage
Differential input resistance
Required external AC coupling capacitor
Min
250
–
–
Typ
–
100
10
Max
2000
–
–
Units
mV
Ω
nF
Table 96: GTH Transceiver Clock Output Level Specification
Symbol
Description
Conditions
VOL
VOH
VDDOUT
Output high voltage for P and N
Output low voltage for P and N
Differential output voltage
(P–N), P = High
(N–P), N = High
RT = 100Ω across P and N signals
RT = 100Ω across P and N signals
RT = 100Ω across P and N signals
VCMOUT Common mode voltage
RT = 100Ω across P and N signals
Min
–
–
–
–
Typ
Max
–
–
Units
mV
mV
–
mV
–
mV
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
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