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DS925 Datasheet, PDF (15/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
DC Input and Output Levels
Values for VIL and VIH are recommended input voltages. Values for IOL and IOH are guaranteed over the
recommended operating conditions at the VOL and VOH test points. Only selected standards are tested.
These are chosen to ensure that all standards meet their specifications. The selected standards are tested
at a minimum VCCO with the respective VOL and VOH voltage levels shown. Other standards are sample
tested.
PS I/O Levels
Table 11: PS MIO and CONFIG DC Input and Output Levels(1)
I/O
VIL
Standard V, Min
V, Max
V, Min
VIH
V, Max
VOL
V, Max
VOH
V, Min
LVCMOS33
LVCMOS25
LVCMOS18
–0.300
0.800
–0.300
0.700
–0.300 35% VCCO_PSIO
2.000
1.700
65% VCCO_PSIO
VCCO_PSIO
VCCO_PSIO + 0.30
VCCO_PSIO + 0.30
0.40
0.70
0.45
2.40
1.70
VCCO_PSIO – 0.45
Notes:
1. Tested according to relevant specifications.
IOL
mA
12
12
12
IOH
mA
–12
–12
–12
Table 12: PS DDR DC Input and Output Levels(1)
DDR
VIL
Standard V, Min V, Max
VIH
V, Min V, Max
VOL(2)
V, Max
VOH(2)
V, Min
IOL IOH
mA mA
DDR4
LPDDR4
DDR3
LPDDR3
DDR3L
0.000 VREF – 0.100 VREF + 0.100 VCCO_PSDDR 0.8 x VCCO_PSDDR – 0.150 0.8 x VCCO_PSDDR + 0.150 10 –0.1
0.000 VREF – 0.100 VREF + 0.100 VCCO_PSDDR 0.3 x VCCO_PSDDR – 0.150 0.3 x VCCO_PSDDR + 0.150 0.1 –10
–0.300 VREF – 0.100 VREF + 0.100 VCCO_PSDDR 0.5 x VCCO_PSDDR – 0.175 0.5 x VCCO_PSDDR + 0.175 8
–8
0.000 VREF – 0.100 VREF + 0.100 VCCO_PSDDR 0.5 x VCCO_PSDDR – 0.150 0.5 x VCCO_PSDDR + 0.150 8
–8
–0.300 VREF – 0.090 VREF + 0.090 VCCO_PSDDR 0.5 x VCCO_PSDDR – 0.150 0.5 x VCCO_PSDDR + 0.150 8
–8
Notes:
1. Tested according to relevant specifications.
2. DDR4 VOL/VOH specifications are only applicable for DQ/DQS pins.
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
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