DS925 Datasheet, PDF (63/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Table 78: Input Delay Measurement Methodology (Cont’d)
Description
I/O Standard
Attribute
V_L(1)(2)
LVDS_25, 2.5V
LVDS_25
1.25 – 0.125
SUB_LVDS, 1.8V
SUB_LVDS
0.9 – 0.125
SLVS, 1.8V
SLVS_400_18
0.9 – 0.125
SLVS, 2.5V
SLVS_400_25
1.25 – 0.125
LVPECL, 2.5V
LVPECL
1.25 – 0.125
MIPI D-PHY (high speed) 1.2V
MIPI_DPHY_DCI_HS 0.2 – 0.125
MIPI D-PHY (low power) 1.2V
MIPI_DPHY_DCI_LP 0.715 – 0.2
V_H(1)(2)
(1^V)M(4E)A(S6) (1^V)(R3E)F(5)
1.25 + 0.125
0⁽⁶⁾
–
0.9 + 0.125
0⁽⁶⁾
–
0.9 + 0.125
0⁽⁶⁾
–
1.25 + 0.125
0⁽⁶⁾
–
1.25 + 0.125
0⁽⁶⁾
–
0.2 + 0.125
0⁽⁶⁾
–
0.715 + 0.2
0⁽⁶⁾
–
Notes:
1. The input delay measurement methodology parameters for LVDCI/HSLVDCI are the same for LVCMOS standards of the
same voltage. Parameters for all other DCI standards are the same for the corresponding non-DCI standards.
2. Input waveform switches between V_Land V_H.
3.
Measurements are made at
measurements. V_REF values
typical, minimum,
listed are typical.
and
maximum
V_REF
values.
Reported
delays
reflect
worst
case
of
these
4. Input voltage level from which measurement starts.
5.
This is an input
in Figure 17.
voltage
reference
that
bears
no
relation
to
the
V_REF/V_MEAS
parameters
found
in
IBIS
models
and/or
noted
6. The value given is the differential input voltage.
DS925 (v1.1) June 20, 2016
Advance Product Specification
www.xilinx.com
Send Feedback
63