DS925 Datasheet, PDF (92/109 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics
Table 116: GTY Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Symbol
Description
All Speed Grades
Units
F_GTYDRPCLK GTYDRPCLK maximum frequency.
MHz
Table 117: GTY Transceiver Reference Clock Switching Characteristics
Symbol
Description
Conditions
All Speed Grades
Min
Typ
Max
F_GCLK
T_RCLK
T_FCLK
T_DCREF
Reference clock frequency range.
60
Reference clock rise time.
20% – 80%
–
Reference clock fall time.
80% – 20%
–
Reference clock duty cycle.
Transceiver PLL only
40
–
820
200
–
200
–
50
60
Units
MHz
ps
ps
%
X-Ref Target - Figure 24
80%
T_RCLK
20%
T_FCLK
ds925_refclk_092115
Figure 24: Reference Clock Timing Parameters
DS925 (v1.1) June 20, 2016
Advance Product Specification
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