LAN9303MI-AKZE Datasheet, PDF (63/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
Top Level Interrupt Registers
(System CSRs)
INT_CFG
INT_STS
INT_EN
SWITCH_INT bit
of INT_STS register
Switch Fabric Interrupt Registers
SW_IMR
SW_IPR
BM bit
of SW_IPR register
Buffer Manager Interrupt Registers
BM_IMR
BM_IPR
SWE bit
of SW_IPR register
Switch Engine Interrupt Registers
SWE_IMR
SWE_IPR
MAC_[2,1,0] bits
of SW_IPR register
Port [2,1,0] MAC Interrupt Registers
MAC_IMR_[2,1,0]
MAC_IPR_[2,1,0]
PHY_INT2 bit
of INT_STS register
Port 2 PHY Interrupt Registers
PHY_INTERRUPT_SOURCE_2
PHY_INTERRUPT_MASK_2
PHY_INT1 bit
of INT_STS register
Port 1 PHY Interrupt Registers
PHY_INTERRUPT_SOURCE_1
PHY_INTERRUPT_MASK_1
GPIO bit
of INT_STS register
GPIO Interrupt Register
GPIO_INT_STS_EN
Figure 5.1 Functional Interrupt Register Hierarchy
The following sections detail each category of interrupts and their related registers. Refer to
Chapter 13, "Register Descriptions," on page 148 for bit-level definitions of all interrupt registers.
SMSC LAN9303M/LAN9303Mi
63
DATASHEET
Revision 1.5 (07-08-11)