LAN9303MI-AKZE Datasheet, PDF (311/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
13.4.3.20 Switch Engine Priority to Queue Register (SWE_PRI_TO_QUE)
Register #:
1845h
Size:
32 bits
This register specifies the Traffic Class table that maps the packet priority into the egress queues.
BITS
DESCRIPTION
31:16
15:14
RESERVED
Priority 7 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 7.
13:12
11:10
9:8
7:6
5:4
3:2
1:0
Priority 6 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 6.
Priority 5 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 5.
Priority 4 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 4.
Priority 3 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 3.
Priority 2 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 2.
Priority 1 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 1.
Priority 0 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 0.
TYPE
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT
-
11b
11b
10b
10b
01b
00b
00b
01b
SMSC LAN9303M/LAN9303Mi
311
DATASHEET
Revision 1.5 (07-08-11)