LAN9303MI-AKZE Datasheet, PDF (28/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
Table 3.4 Port 1 MII/RMII Pins (continued)
NUM
PINS
NAME
SYMBOL
Port 1 MII
Output Data 3
P1_OUTD3
1
Port 1 Duplex
Polarity
Configuration
Strap
DUPLEX_POL_1
Port 1 MII
Output Data 2
1
P1_OUTD2
Port 1 Mode[2]
Configuration
Strap
P1_MODE2
Port 1 MII
Output Data 1
1
P1_OUTD1
Port 1 Mode[1]
Configuration
Strap
P1_MODE1
BUFFER
TYPE
DESCRIPTION
O8
MII MAC Mode: This pin is the transmit data 3 bit
from the switch to the external PHY.
O8
MII PHY Mode: This pin is the receive data 3 bit
from the switch to the external MAC. The output
driver is disabled when the Isolate bit is set in the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
-
RMII PHY Mode: This pin is not used.
-
Internal PHY Mode: This pin is not used.
IS
(PU)
Note 3.5
This strap selects the default of the duplex polarity
strap for Port 1 MII (duplex_pol_strap_1) and is
used only in MII PHY, RMII PHY, and MII MAC
modes. See Note 3.4.
If the strap is value is 0, a 0 on P1_DUPLEX
means full duplex while a 1 means half duplex. If
the strap value is 1, a 1 on P1_DUPLEX means full
duplex, while a 0 means half duplex.
O8
MII MAC Mode: This pin is the transmit data 2 bit
from the switch to the external PHY.
O8
MII PHY Mode: This pin is the receive data 2 bit
from the switch to the external MAC. The output
driver is disabled when the Isolate bit is set in the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
-
RMII PHY Mode: This pin is not used.
-
Internal PHY Mode: This pin is not used.
IS
(PU)
Note 3.5
This strap configures the mode for the Port 1 MII
pins. See Note 3.4.
Please refer to the P1_MODE0 strap entry for
mode encoding details.
O8
MII MAC Mode: This pin is the transmit data 1 bit
from the switch to the external PHY.
O8
MII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the Isolate bit is set in the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
O8
RMII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the Isolate bit is set in the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
-
Internal PHY Mode: This pin is not used.
IS
(PU)
Note 3.5
This strap configures the mode for the Port 1 MII
pins. See Note 3.4.
Please refer to the P1_MODE0 strap entry for
mode encoding details.
Revision 1.5 (07-08-11)
28
DATASHEET
SMSC LAN9303M/LAN9303Mi