LAN9303MI-AKZE Datasheet, PDF (32/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

NUM
PINS
NAME
1
Port 0 MII Input
Data 2
1
Port 0 MII Input
Data 1
1
Port 0 MII Input
Data 0
1
Port 0 MII Input
Data Valid
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
Table 3.5 Port 0 MII/RMII Pins (continued)
SYMBOL
P0_IND2
P0_IND1
P0_IND0
P0_INDV
BUFFER
TYPE
DESCRIPTION
IS
(PD)
MII MAC Mode: This pin is the receive data 2 bit
from the external PHY to the switch.
IS
(PD)
MII PHY Mode: This pin is transmit data 2 bit from
the external MAC to the switch. The pull-down and
input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
-
RMII PHY Mode: This pin is not used.
IS
(PD)
MII MAC Mode: This pin is the receive data 1 bit
from the external PHY to the switch.
IS
(PD)
MII PHY Mode: This pin is the transmit data 1 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
IS
(PD)
RMII PHY Mode: This pin is the transmit data 1 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
IS
(PD)
MII MAC Mode: This pin is the receive data 0 bit
from the external PHY to the switch.
IS
(PD)
MII PHY Mode: This pin is the transmit data 0 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
IS
(PD)
RMII PHY Mode: This pin is the transmit data 0 bit
from the external MAC to the switch. The pull-down
and input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
IS
(PD)
MII MAC Mode: This pin is the RX_DV signal from
the external PHY and indicates valid data on
P0_IND[3:0] and P0_INER.
IS
(PD)
MII PHY Mode: This pin is the TX_EN signal from
the external MAC and indicates valid data on
P0_IND[3:0] and P0_INER. The pull-down and
input buffer are disabled when the Isolate
(VPHY_ISO) bit is set in the Virtual PHY Basic
Control Register (VPHY_BASIC_CTRL).
IS
(PD)
RMII PHY Mode: This pin is the TX_EN signal from
the external MAC and indicates valid data on
P0_IND[1:0]. The pull-down and input buffer are
disabled when the Isolate (VPHY_ISO) bit is set in
the Virtual PHY Basic Control Register
(VPHY_BASIC_CTRL).
Revision 1.5 (07-08-11)
32
DATASHEET
SMSC LAN9303M/LAN9303Mi