LAN9303MI-AKZE Datasheet, PDF (225/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
13.3.2.11 Port x PHY Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x)
Index (decimal): 29
Size:
16 bits
This read-only register is used to determine to source of various Port x PHY interrupts. All interrupt
source bits in this register are read-only and latch high upon detection of the corresponding interrupt
(if enabled). A read of this register clears the interrupts. These interrupts are enabled or masked via
the Port x PHY Interrupt Mask Register (PHY_INTERRUPT_MASK_x).
BITS
DESCRIPTION
15:8 RESERVED
7 INT7
This interrupt source bit indicates when the Energy On (ENERGYON) bit of
the Port x PHY Mode Control/Status Register
(PHY_MODE_CONTROL_STATUS_x) has been set.
0: Not source of interrupt
1: ENERGYON generated
6 INT6
This interrupt source bit indicates Auto-Negotiation is complete.
0: Not source of interrupt
1: Auto-Negotiation complete
5 INT5
This interrupt source bit indicates a remote fault has been detected.
0: Not source of interrupt
1: Remote fault detected
4 INT4
This interrupt source bit indicates a Link Down (link status negated).
0: Not source of interrupt
1: Link Down (link status negated)
3 INT3
This interrupt source bit indicates an Auto-Negotiation LP acknowledge.
0: Not source of interrupt
1: Auto-Negotiation LP acknowledge
2 INT2
This interrupt source bit indicates a Parallel Detection fault.
0: Not source of interrupt
1: Parallel Detection fault
1 INT1
This interrupt source bit indicates an Auto-Negotiation page received.
0: Not source of interrupt
1: Auto-Negotiation page received
0 RESERVED
TYPE
RO
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO
DEFAULT
-
0b
0b
0b
0b
0b
0b
0b
-
SMSC LAN9303M/LAN9303Mi
225
DATASHEET
Revision 1.5 (07-08-11)