LAN9303MI-AKZE Datasheet, PDF (288/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
13.4.3.2 Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0)
Register #:
1801h
Size:
32 bits
This register is used in conjunction with the Switch Engine ALR Write Data 1 Register
(SWE_ALR_WR_DAT_1) and contains the first 32 bits of ALR data to be manually written via the Make
Entry command in the Switch Engine ALR Command Register (SWE_ALR_CMD).
BITS
DESCRIPTION
31:0 MAC Address
This field contains the first 32 bits of the ALR entry that will be written into
the ALR table. These bits correspond to the first 32 bits of the MAC address.
Bit 0 holds the LSB of the first byte (the multicast bit).
TYPE
R/W
DEFAULT
00000000h
Revision 1.5 (07-08-11)
288
DATASHEET
SMSC LAN9303M/LAN9303Mi