LAN9303MI-AKZE Datasheet, PDF (232/386 Pages) SMSC Corporation – Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
Table 13.14 Indirectly Accessible Switch Control and Status Registers (continued)
REGISTER #
0842h-0850h
0851h
0852h
0853h
0854h
0855h
0856h
0857h
0858h
0859h
085Ah
085Bh
085Ch
085Dh
085Eh
085Fh
0860h
0861h
0862h
0863h
0864-087Fh
0880h
0881h
0882h-0BFFh
SYMBOL
REGISTER NAME
RESERVED
MAC_TX_DEFER_CNT_1
Reserved for Future Use
Port 1 MAC Transmit Deferred Count Register,
Section 13.4.2.25
MAC_TX_PAUSE_CNT_1
MAC_TX_PKTOK_CNT_1
MAC_RX_64_CNT_1
Port 1 MAC Transmit Pause Count Register, Section 13.4.2.26
Port 1 MAC Transmit OK Count Register, Section 13.4.2.27
Port 1 MAC Transmit 64 Byte Count Register, Section 13.4.2.28
MAC_TX_65_TO_127_CNT_1
MAC_TX_128_TO_255_CNT_1
MAC_TX_256_TO_511_CNT_1
Port 1 MAC Transmit 65 to 127 Byte Count Register,
Section 13.4.2.29
Port 1 MAC Transmit 128 to 255 Byte Count Register,
Section 13.4.2.30
Port 1 MAC Transmit 256 to 511 Byte Count Register,
Section 13.4.2.31
MAC_TX_512_TO_1023_CNT_1
MAC_TX_1024_TO_MAX_CNT_1
MAC_TX_UNDSZE_CNT_1
Port 1 MAC Transmit 512 to 1023 Byte Count Register,
Section 13.4.2.32
Port 1 MAC Transmit 1024 to Max Byte Count Register,
Section 13.4.2.33
Port 1 MAC Transmit Undersize Count Register,
Section 13.4.2.34
RESERVED
MAC_TX_PKTLEN_CNT_1
MAC_TX_BRDCST_CNT_1
Reserved for Future Use
Port 1 MAC Transmit Packet Length Count Register,
Section 13.4.2.35
Port 1 MAC Transmit Broadcast Count Register,
Section 13.4.2.36
MAC_TX_MULCST_CNT_1
MAC_TX_LATECOL_1
MAC_TX_EXCOL_CNT_1
Port 1 MAC Transmit Multicast Count Register,
Section 13.4.2.37
Port 1 MAC Transmit Late Collision Count Register,
Section 13.4.2.38
Port 1 MAC Transmit Excessive Collision Count Register,
Section 13.4.2.39
MAC_TX_SNGLECOL_CNT_1
MAC_TX_MULTICOL_CNT_1
MAC_TX_TOTALCOL_CNT_1
Port 1 MAC Transmit Single Collision Count Register,
Section 13.4.2.40
Port 1 MAC Transmit Multiple Collision Count Register,
Section 13.4.2.41
Port 1 MAC Transmit Total Collision Count Register,
Section 13.4.2.42
RESERVED
MAC_IMR_1
MAC_IPR_1
Reserved for Future Use
Port 1 MAC Interrupt Mask Register, Section 13.4.2.43
Port 1 MAC Interrupt Pending Register, Section 13.4.2.44
RESERVED
Reserved for Future Use
Switch Port 2 CSRs
Revision 1.5 (07-08-11)
232
DATASHEET
SMSC LAN9303M/LAN9303Mi