HD6433832S Datasheet, PDF(97/560 Page) Renesas Technology Corp – single-chip microcomputers

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HD6433832S Datasheet, PDF (97/560 Pages) Renesas Technology Corp – single-chip microcomputers

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SP â

SP â

PC H

PC L

SP â

R1L

PC L

H'FEFC

H'FEFD

H'FEFF

BSR instruction

MOV. B R1L, @âR7

SP set to H'FEFF

Stack accessed beyond SP Contents of PCH are lost

Notation:

PCH: Upper byte of program counter

PCL: Lower byte of program counter

R1L: General register R1L

SP: Stack pointer

Figure 3.7 Operation when Odd Address is Set in SP

When CCR contents are saved to the stack during interrupt exception handling or restored when

RTE is executed, this also takes place in word size. Both the upper and lower bytes of word data

are saved to the stack; on return, the even address contents are restored to CCR while the odd

address contents are ignored.

3.4.2 Notes on Rewriting Port Mode Registers

When a port mode register is rewritten to switch the functions of external interrupt pins, the

following points should be observed.

When an external interrupt pin function is switched by rewriting the port mode register that

controls these pins (IRQ4 to IRQ0, and WKP7 to WKP0), the interrupt request flag may be set to 1

at the time the pin function is switched, even if no valid interrupt is input at the pin. Be sure to

clear the interrupt request flag to 0 after switching pin functions. Table 3.5 shows the conditions

under which interrupt request flags are set to 1 in this way.

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