HD6433832S Datasheet, PDF (236/560 Pages) Renesas Technology Corp – single-chip microcomputers

9.6.5 Application Notes
Input Clock Switching and TCG Operation: Depending on when the input clock is switched,
there will be cases in which TCG is incremented in the process. Table 9.17 shows the relation
between internal clock switchover timing (selected in bits CKS1 and CKS0) and TCG operation.
If an internal clock (derived from the system clock φ or subclock φ_SUB) is used, an increment pulse
is generated when a falling edge of the internal clock is detected. For this reason, in a case like No.
3 in table 9.17, where the clock is switched at a time such that the clock signal goes from high
level before switching to low level after switching, the switchover is seen as a falling edge, a count
clock pulse is generated, and TCG is incremented.
Table 9.17 Internal Clock Switching and TCG Operation
Clock Level Before
and After Modifying
No. Bits CKS1 and CKS0
1 Goes from low level
to low level
TCG Operation
Clock before
switching
Clock after
switching
Count clock
TCG
2 Goes from low level
to high level
Clock before
switching
Clock after
switching
Count clock
N
CKS bits modified
N +1
TCG
N
N +1
N +2
CKS bits modified
221