HD6433832S Datasheet, PDF (239/560 Pages) Renesas Technology Corp – single-chip microcomputers

when the pin function is switched, either by controlling the level of the input capture pin so
that it does not satisfy the conditions in tables 9.18 and 9.19, or by setting the IIEGS bit of
TMG to select the edge opposite to the falsely generated edge.
Set I bit to 1 in CCR
Modify port mode register
Wait for TMIG to be recognized
Clear interrupt request flag to 0
Disable interrupts (or disable by clearing interrupt
enable bit in interrupt enable register 2)
Modify port mode register setting, wait for TMIG
to be recognized (at least two system clocks when
noise canceling is disabled; at least five sampling
clocks when noise canceling is enabled), then
clear interrupt request flag to 0
Clear I bit to 0 in CCR
Enable interrupts
Figure 9.15 Procedure for Modifying Port Mode Register and Clearing Interrupt
Request Flag
9.6.6 Sample Timer G Application
The absolute values of the high and low widths of the input capture signal can be measured by
using timer G. The CCLR1 and CCLR0 bits of TMG should be set to 1. Figure 9.16 shows an
example of this operation.
Input capture
signal
H'FF
Input capture
register GF
Input capture
register GR
H'00
TCG
Counter cleared
Figure 9.16 Sample Timer G Application
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