HD6433832S Datasheet, PDF (451/560 Pages) Renesas Technology Corp – single-chip microcomputers

14.12.3 AC Characteristics
Table 14.55 lists the control signal timing, and tables 14.56 and 14.57 list the serial interface
timing of the H8/3835, H8/3836, and H8/3837 (wide temperature range (I-spec) version).
Table 14.55 Control Signal Timing of H8/3835, H8/3836, and H8/3837 (Wide Temperature
Range (I-Spec) Version)
V_CC = 4.5 V to 5.5 V, AV_CC = 4.5 V to 5.5 V, V_SS = AV_SS = 0.0 V, T_a = –40°C to +85°C, including
subactive mode, unless otherwise specified.
Item
Applicable
Symbol Pins
Min Typ
Max Unit Test Condition
Reference
Figure
System clock
f_OSC
oscillation frequency
OSC₁, OSC₂ 2.0 —
10.0 MHz
OSC clock (φ_OSC)
t_OSC
OSC₁, OSC₂ 100.0 —
1000.0 ns
cycle time
1
Figure 14.1
System clock (φ)
t_cyc
2
—
16
t_OSC
1
cycle time
——
2000.0 ns
Subclock oscillation f_W
frequency
X₁, X₂
— 32.768 —
kHz
Watch clock (φ_W)
t_W
cycle time
X₁, X₂
— 30.5 —
µs
Subclock (φ_SUB) cycle t_subcyc
2—
8
t_W
2
time
Instruction cycle time
Oscillation
t_rc
stabilization time
(crystal oscillator)
2—
OSC₁, OSC₂ — —
—
40.0
t_cyc
t_subcyc
ms
Oscillation
t_rc
stabilization time
X₁, X₂
——
2.0 s
External clock high t_CPH
width
OSC₁
40.0 —
—
ns
Figure 14.1
External clock low
t_CPL
width
OSC₁
40.0 —
—
ns
Figure 14.1
External clock rise t_CPr
time
——
15.0 ns
Figure 14.1
External clock fall
t_CPf
time
——
15.0 ns
Figure 14.1
Pin RES low width t_REL
RES
10 —
—
tcyc
Figure 14.2
Notes: 1. A frequency between 1 MHz to 10 MHz is required when an external clock is input.
2. Selected with SA1 and SA0 of system control register 2 (SYSCR2).
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