HD6433832S Datasheet, PDF (121/560 Pages) Renesas Technology Corp – single-chip microcomputers

5.8.2 Calculation of Direct Transfer Time before Transition
Time Required before Direct Transfer from Active (High-speed) Mode to Active (Medium-
Speed) Mode: A direct transfer is made from active (high-speed) mode to active (medium-speed)
mode when a SLEEP instruction is executed in active (high-speed) mode while the SSBY and
LSON bits in SYSCR1 are cleared to 0, the MSON bit in SYSCR2 is set to 1, and the DTON bit in
SYSCR2 is set to 1. A direct transfer time, that is, the time from SLEEP instruction execution to
interrupt exception handling completion is calculated by expression (1) below.
Direct transfer time = (number of states for SLEEP instruction execution + number of
states for internal processing) × tcyc before transition + number of
states for interrupt exception handling execution × tcyc after
transition
...... (1)
Example: Direct transfer time for the H8/3834 Series
= (2 + 1) × 2tosc + 14 × 16tosc = 230 tosc
Notation:
tosc: OSC clock cycle time
tcyc: System clock (φ) cycle time
Time Required before Direct Transfer from Active (Medium-Speed) Mode to Active (High-
Speed) Mode: A direct transfer is made from active (medium-speed) mode to active (high-speed)
mode when a SLEEP instruction is executed in active (medium-speed) mode while the SSBY and
LSON bits in SYSCR1 are cleared to 0, the MSON bit in SYSCR2 is cleared to 0, and the DTON
bit in SYSCR2 is set to 1. A direct transfer time, that is, the time from SLEEP instruction
execution to interrupt exception handling completion is calculated by expression (2) below.
Direct transfer time = (number of states for SLEEP instruction execution + number of
states for internal processing) × tcyc before transition + number of
states for interrupt exception handling execution × tcyc after
transition
...... (2)
Example: Direct transfer time for the H8/3834 Series
= (2 + 1) × 16tosc + 14 × 2tosc = 76 tosc
Notation:
tosc: OSC clock cycle time
tcyc: System clock (φ) cycle time
Time Required before Direct Transfer from Subactive Mode to Active (High-Speed) Mode:
A direct transfer is made from subactive mode to active (high-speed) mode when a SLEEP
instruction is executed in subactive mode while the SSBY bit in SYSCR1 is set to 1, the LSON bit
in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is cleared to 0, the DTON bit in SYSCR2 is
set to 1, and the TMA3 bit in TMA is set to 1. A direct transfer time, that is, the time from SLEEP
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