HD6433832S Datasheet, PDF (237/560 Pages) Renesas Technology Corp – single-chip microcomputers

Table 9.17 Internal Clock Switching and TCG Operation
Clock Level Before
and After Modifying
No. Bits CKS1 and CKS0
3 Goes from high level
to low level
TCG Operation
Clock before
switching
Clock after
switching
*
Count clock
TCG
N
4 Goes from high level
to high level
Clock before
switching
N +1
CKS bits modified
N +2
Clock after
switching
Count clock
TCG
N
N +1
N +2
CKS bits modified
Note: * The switchover is seen as a falling edge of the clock pulse, and TCG is incremented.
Note on Rewriting Port Mode Registers: When a port mode register setting is modified to
enable or disable the input capture function or input capture noise canceling function, note the
following points.
• Switching the function of the input capture pin
When the function of the input capture pin is switched by modifying the TMIG bit in port
mode register 1 (PMR1) an input capture edge may be recognized even though no valid signal
edge has been input. This occurs under the conditions listed in table 9.18.
222