HD6433832S Datasheet, PDF (268/560 Pages) Renesas Technology Corp – single-chip microcomputers

Bit 6—Character Length (CHR): Bit 6 selects either 7 bits or 8 bits as the data length in
asynchronous mode. In synchronous mode the data length is always 8 bits regardless of the setting
here.
Bit 6: CHR
Description
0
8-bit data
(initial value)
1
7-bit data*
Note: * When 7-bit data is selected as the character length in asynchronous mode, the MSB (bit 7)
in the transmit data register is not transmitted.
Bit 5—Parity Enable (PE): In asynchronous mode, bit 5 selects whether or not a parity bit is to
be added to transmitted data and checked in received data. In synchronous mode there is no adding
or checking of parity regardless of the setting here.
Bit 5: PE
Description
0
Parity bit adding and checking disabled
(initial value)
1
Parity bit adding and checking enabled*
Note: * When PE is set to 1, then either odd or even parity is added to transmit data, depending on
the setting of the parity mode bit (PM). When data is received, it is checked for odd or even
parity as designated in bit PM.
Bit 4—Parity Mode (PM): In asynchronous mode, bit 4 selects whether odd or even parity is to
be added to transmitted data and checked in received data. The PM setting is valid only if bit PE is
set to 1, enabling parity adding/checking. In synchronous mode, or if parity adding/checking is
disabled in asynchronous mode, the PM setting is invalid.
Bit 4: PM
Description
0
Even parity*¹
(initial value)
1
Odd parity*²
Notes: 1. When even parity is designated, a parity bit is added to the transmitted data so that the
sum of 1s in the resulting data is an even number. When data is received, the sum of 1s
in the data plus parity bit is checked to see if the result is an even number.
2. When odd parity is designated, a parity bit is added to the transmitted data so that the
sum of 1s in the resulting data is an odd number. When data is received, the sum of 1s
in the data plus parity bit is checked to see if the result is an odd number.
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