HD6433832S Datasheet, PDF (84/560 Pages) Renesas Technology Corp – single-chip microcomputers

Bit 0—IRQ₀ Edge Select (IEG0): Bit 0 selects the input sensing of pin IRQ₀.
Bit 0: IEG0
0
1
Description
Falling edge of IRQ₀ pin input is detected
Rising edge of IRQ₀ pin input is detected
(initial value)
Interrupt Enable Register 1 (IENR1)
Bit
Initial value
Read/Write
7
IENTA
0
R/W
6
IENS1
0
R/W
5
IENWP
0
R/W
4
IEN4
0
R/W
3
IEN3
0
R/W
2
IEN2
0
R/W
1
IEN1
0
R/W
0
IEN0
0
R/W
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Timer A Interrupt Enable (IENTA): Bit 7 enables or disables timer A overflow interrupt
requests.
Bit 7: IENTA
0
1
Description
Disables timer A interrupts
Enables timer A interrupts
(initial value)
Bit 6—SCI1 Interrupt Enable (IENS1): Bit 6 enables or disables SCI1 transfer complete
interrupt requests.
Bit 6: IENS1
0
1
Description
Disables SCI1 interrupts
Enables SCI1 interrupts
(initial value)
Bit 5—Wakeup Interrupt Enable (IENWP): Bit 5 enables or disables WKP₇ to WKP₀ interrupt
requests.
Bit 5: IENWP
0
1
Description
Disables interrupt requests from WKP₇ to WKP₀
Enables interrupt requests from WKP₇ to WKP₀
(initial value)
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