HD6433832S Datasheet, PDF (109/560 Pages) Renesas Technology Corp – single-chip microcomputers

Reset state
Program execution state
LSON = 0, MSON = 0
Program halt state
SSBY = 1,
TMA3 = 0,
LSON = 0
Active (high-speed)
mode
*4
*1
insStrLuEctEioPn
*3
Standby mode
SLEEP _instruction
LSON = 0,
MSON = 1
=1
DTON
*4
Active
*3
SSBY = 1,
TMA3 = 1
Watch mode
*1
(medium-speed)
=1
mode
DTON
SLEEP
instruction
DTON ⁼
1
SLEEP
*1
instruction
LSON = 1,
TMA3 = 1
Subactive mode
SLEEP
instruction
*2
Program halt state
SSBY = 0,
LSON = 0
Sleep mode
SSBY = 0,
LSON = 1,
TMA3 = 1
Subsleep mode
: Transition caused by exception handling
Power-down mode
A transition between different modes cannot be made to occur simply because an interrupt request is
generated. Make sure that the interrupt is accepted and interrupt handling is performed.
Details on the mode transition conditions are given in the explanations of each mode, in sections 5.2
through 5.8.
Notes: 1. Timer A interrupt, IRQ 0 interrupt, WKP 0 to WKP 7 interrupts
2. Timer A interrupt, timer C interrupt, timer G interrupt, IRQ₀ to IRQ₄ interrupts,
WKP₀ to WKP₇ interrupts
3. All interrupts
4. IRQ₀ interrupt, IRQ₁ interrupt, WKP₀ to WKP₇ interrupts
Figure 5.1 Operation Mode Transition Diagram
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