HD6433832S Datasheet, PDF (46/560 Pages) Renesas Technology Corp – single-chip microcomputers

2.5.3 Logic Operations
Table 2.6 describes the four instructions that perform logic operations.
Table 2.6 Logic Operation Instructions
Instruction Size*
Function
AND
B
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data
OR
B
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data
XOR
B
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data
NOT
B
~ Rd → Rd
Obtains the one’s complement (logical complement) of general register
contents
Note: * Size: Operand size
B: Byte
2.5.4 Shift Operations
Table 2.7 describes the eight shift instructions.
Table 2.7 Shift Instructions
Instruction Size*
Function
SHAL
B
Rd shift → Rd
SHAR
Performs an arithmetic shift operation on general register contents
SHLL
B
Rd shift → Rd
SHLR
Performs a logical shift operation on general register contents
ROTL
B
Rd rotate → Rd
ROTR
Rotates general register contents
ROTXL
B
Rd rotate through carry → Rd
ROTXR
Rotates general register contents through the C (carry) bit
Notes: * Size: Operand size
B: Byte
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