HD6473837H Datasheet, PDF (87/562 Pages) Renesas Technology Corp – Hardware Manual

Bits 4 to 0—IRQ₄ to IRQ₀ Interrupt Enable (IEN4 to IEN0): Bits 4 to 0 enable or disable IRQ₄
to IRQ₀ interrupt requests.
Bit n: IENn
0
1
Description
Disables interrupt request IRQn
Enables interrupt request IRQn
(initial value)
(n = 4 to 0)
Interrupt Enable Register 2 (IENR2)
Bit
Initial value
Read/Write
7
IENDT
0
R/W
6
IENAD
0
R/W
5
IENS2
0
R/W
4
IENTG
0
R/W
3
2
IENTFH IENTFL
0
0
R/W
R/W
1
IENTC
0
R/W
0
IENTB
0
R/W
IENR2 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Direct Transfer Interrupt Enable (IENDT): Bit 7 enables or disables direct transfer
interrupt requests.
Bit 7: IENDT
0
1
Description
Disables direct transfer interrupt requests
Enables direct transfer interrupt requests
(initial value)
Bit 6—A/D Converter Interrupt Enable (IENAD): Bit 6 enables or disables A/D converter
interrupt requests.
Bit 6: IENAD
0
1
Description
Disables A/D converter interrupt requests
Enables A/D converter interrupt requests
(initial value)
Bit 5—SCI2 Interrupt Enable (IENS2): Bit 5 enables or disables SCI2 transfer complete and
transfer abort interrupt requests.
Bit 5: IENS2
0
1
Description
Disables SCI2 interrupts
Enables SCI2 interrupts
(initial value)
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