HD6473837H Datasheet, PDF (108/562 Pages) Renesas Technology Corp – Hardware Manual

Pin Connection when Not Using Subclock: When the subclock is not used, connect pin X₁ to
V_CC and leave pin X₂ open, as shown in figure 4.9.
V_CC
X₁
X₂
Open
Figure 4.9 Pin Connection when Not Using Subclock
4.4 Prescalers
The H8/3834 Series is equipped with two on-chip prescalers having different input clocks
(prescaler S and prescaler W). Prescaler S is a 13-bit counter using the system clock (φ) as its
input clock. Its prescaled outputs provide internal clock signals for on-chip peripheral modules.
Prescaler W is a 5-bit counter using a 32.768-kHz signal divided by 4 (φ_W/4) as its input clock. Its
prescaled outputs are used by timer A as a time base for timekeeping.
Prescaler S (PSS): Prescaler S is a 13-bit counter using the system clock (φ) as its input clock. It
is incremented once per clock period.
Prescaler S is initialized to H'0000 by a reset, and starts counting on exit from the reset state.
In standby mode, watch mode, subactive mode, and subsleep mode, the system clock pulse
generator stops. Prescaler S also stops and is initialized to H'0000.
The CPU cannot read or write prescaler S.
The output from prescaler S is shared by timer A, timer B, timer C, timer F, timer G, SCI1, SCI2,
SCI3, the A/D converter, LCD controller, and 14-bit PWM. The divider ratio can be set separately
for each on-chip peripheral function.
In active (medium-speed) mode the clock input to prescaler S is φ_OSC/16.
Prescaler W (PSW): Prescaler W is a 5-bit counter using a 32.768 kHz signal divided by 4 (φ_W/4)
as its input clock.
Prescaler W is initialized to H'00 by a reset, and starts counting on exit from the reset state.
Even in standby mode, watch mode, subactive mode, or subsleep mode, prescaler W continues
functioning so long as clock signals are supplied to pins X₁ and X₂.
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