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| HD6473837H Datasheet, PDF (142/562 Pages) Renesas Technology Corp – Hardware Manual | |||
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Figure 6.9 shows a write/verify timing diagram.
Write
Address
Data
VPP
VPP
VCC
tAS
Input data
tDS
tDH
tVPS
VCC
VCC +1
VCC
tVCS
Verify
tAH
Output data
tDF
CE
PGM
OE
tCES
tPW
tOPW*
tOES
tOE
Note: * tOPW is defined by the value given in figure 6-8 high-speed, high-reliability
programming flow chart.
Figure 6.9 PROM Write/Verify Timing
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