HD6473837H Datasheet, PDF (280/562 Pages) Renesas Technology Corp – Hardware Manual

Table 10.8 BRR Settings and Bit Rates in Asynchronous Mode (cont)
OSC (MHz)
9.8304
10
Bit Rate
Error
Error
(bits/s) n N (%)
n N (%)
110
2 86 +0.31 2 88 –0.25
150
1 255 0
2 64 +0.16
300
1 127 0
1 129 +0.16
600
0 255 0
1 64 +0.16
1200
0 127 0
0 129 +0.16
2400
0 63 0
0 64 +0.16
4800
0 31 0
0 32 –1.36
9600
0 15 0
0 15 +1.73
19200
070
0 7 +1.73
31250
0 4 –1.70 0 4 0
38400
030
0 3 +1.73
Notes: 1. Settings should be made so that error is within 1%.
2. BRR setting values are derived by the following equation.
N=
OSC
64 × 2²ⁿ × B
× 10⁶ – 1
B: Bit rate (bits/s)
N: BRR baud rate generator setting (0 ≤ N ≤ 255)
OSC: Value of φ_OSC (MHz)
n: Baud rate generator input clock number (n = 0, 1, 2, 3)
3. The error values in table 10.8 were derived by performing the following calculation and
rounding off to two decimal places.
Error (%) = ^{B – R} × 100
R
B: Bit rate found from n, N, and OSC
R: Bit rate listed in left column of table 10.8
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