HD6473837H Datasheet, PDF (283/562 Pages) Renesas Technology Corp – Hardware Manual

The meaning of n is shown in table 10.12.
Table 10.12 Relation between n and Clock
SMR Setting
n
Clock
CKS1
CKS0
0
φ
0
0
1
φ/4
0
1
2
φ/16
1
0
3
φ/64
1
1
10.4.3 Operation
SCI3 supports serial data communication in both asynchronous mode, where each character
transferred is synchronized separately, and synchronous mode, where transfer is synchronized by
clock pulses.
The choice of asynchronous mode or synchronous mode, and the communication format, is made
in the serial mode register (SMR), as shown in table 10.13. The SCI3 clock source is determined
by bit COM in SMR and bits CKE1 and CKE0 in serial control register 3 (SCR3), as shown in
table 10.14.
Asynchronous Mode:
• Data length: choice of 7 bits or 8 bits
• Transmit/receive format options include addition of parity bit, multiprocessor bit, and one or
two stop bits (character length depends on this combination of options).
• Framing error (FER), parity error (PER), overrun error (OER), and line breaks can be detected
when data is received.
• Clock source: Choice of internal clocks or an external clock
When an internal clock is selected: Operates on baud rate generator clock. A clock can be
output with the same frequency as the bit rate.
When an external clock is selected: A clock input with a frequency 16 times the bit rate is
required (internal baud rate generator is not used).
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