HD6473837H Datasheet, PDF (84/562 Pages) Renesas Technology Corp – Hardware Manual

Table 3.2 Interrupt Sources and Priorities (cont)
Priority Interrupt Source Interrupt
Vector
Number
High
Timer FL
Timer FL compare match
14
Timer FL overflow
Timer FH
Timer FH compare match
15
Timer FH overflow
Timer G
Timer G input capture
16
Timer G overflow
SCI2
SCI2 transfer complete
17
SCI2 transfer abort
SCI3
SCI3 transmit end
18
SCI3 transmit data empty
SCI3 receive data full
SCI3 overrun error
SCI3 framing error
SCI3 parity error
A/D converter
A/D conversion end
19
(SLEEP instruction Direct transfer
20
Low
executed)
Note: Vector addresses H'0002 to H'0007 are reserved and cannot be used.
Vector Address
H'001C to H'001D
H'001E to H'001F
H'0020 to H'0021
H'0022 to H'0023
H'0024 to H'0025
H'0026 to H'0027
H'0028 to H'0029
3.3.2 Interrupt Control Registers
Table 3.3 lists the registers that control interrupts.
Table 3.3 Interrupt Control Registers
Register Name
Abbreviation R/W
IRQ edge select register
IEGR
R/W
Interrupt enable register 1
IENR1
R/W
Interrupt enable register 2
IENR2
R/W
Interrupt request register 1
IRR1
R/W*
Interrupt request register 2
IRR2
R/W*
Wakeup interrupt request register IWPR
R/W*
Note: * Write is enabled only for writing of 0 to clear a flag.
Initial Value
H'E0
H'00
H'00
H'20
H'00
H'00
Address
H'FFF2
H'FFF3
H'FFF4
H'FFF6
H'FFF7
H'FFF9
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