HD6473837H Datasheet, PDF (189/562 Pages) Renesas Technology Corp – Hardware Manual

8.11.2 Register Configuration and Description
Table 8.29 shows the port A register configuration.
Table 8.29 Port A Registers
Name
Port data register A
Port control register A
Abbrev.
R/W
PDRA
R/W
PCRA
W
Initial Value
H'F0
H'F0
Address
H'FFDD
H'FFED
Port Data Register A (PDRA)
Bit
7
6
5
4
3
2
1
0
—
—
—
—
PA₃
PA₂
PA₁
PA₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
PDRA is an 8-bit register that stores data for port A pins PA₃ to PA₀. If port A is read while PCRA
bits are set to 1, the values stored in PDRA are read, regardless of the actual pin states. If port A is
read while PCRA bits are cleared to 0, the pin states are read.
Upon reset, PDRA is initialized to H'F0.
Port Control Register A (PCRA)
Bit
7
6
5
4
3
2
1
0
—
—
—
—
PCRA₃ PCRA₂ PCRA₁ PCRA₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
W
W
W
W
PCRA is an 8-bit register for controlling whether each of the port A pins PA₃ to PA₀ functions as
an input or output pin. Setting a PCRA bit to 1 makes the corresponding pin an output pin, while
clearing the bit to 0 makes the pin an input pin. The settings in PCRA and in PDRA are valid only
when the corresponding pin is designated in LPCR as a general I/O pin.
Upon reset, PCRA is initialized to H'F0.
PCRA is a write-only register. All bits are read as 1.
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