HD6473837H Datasheet, PDF (36/562 Pages) Renesas Technology Corp – Hardware Manual

2.3.2 Memory Data Formats
Figure 2.4 indicates the data formats in memory. For access by the H8/300L CPU, word data
stored in memory must always begin at an even address. In word access the least significant bit of
the address is regarded as 0. If an odd address is specified, the access is performed at the preceding
even address. This rule affects the MOV.W instruction, and also applies to instruction fetching.
Data Type
Address
Data Format
1-bit data
7
0
Address n 7 6 5 4 3 2 1 0
Byte data
Address n MSB
LSB
Word data ^{Even address MSB}
Upper 8 bits
Odd address
Lower 8 bits
LSB
Byte data (CCR) on stack ^{Even address MSB}
CCR
LSB
Odd address MSB
CCR*
LSB
Word data on stack ^{Even address MSB}
Odd address
LSB
CCR: Condition code register
Note: * Ignored on return
Figure 2.4 Memory Data Formats
When the stack is accessed using R7 as an address register, word access should always be
performed. For the CCR, the same value is stored in the upper 8 bits and lower 8 bits as word data.
On return, the lower 8 bits are ignored.
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