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HD6473837H Datasheet, PDF (453/562 Pages) Renesas Technology Corp – Hardware Manual | |||
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14.12.3 AC Characteristics
Table 14.55 lists the control signal timing, and tables 14.56 and 14.57 list the serial interface
timing of the H8/3835, H8/3836, and H8/3837 (wide temperature range (I-spec) version).
Table 14.55 Control Signal Timing of H8/3835, H8/3836, and H8/3837 (Wide Temperature
Range (I-Spec) Version)
VCC = 4.5 V to 5.5 V, AVCC = 4.5 V to 5.5 V, VSS = AVSS = 0.0 V, Ta = â40°C to +85°C, including
subactive mode, unless otherwise specified.
Item
Applicable
Symbol Pins
Min Typ
Max Unit Test Condition
Reference
Figure
System clock
fOSC
oscillation frequency
OSC1, OSC2 2.0 â
10.0 MHz
OSC clock (ÏOSC)
tOSC
OSC1, OSC2 100.0 â
1000.0 ns
cycle time
1
Figure 14.1
System clock (Ï)
tcyc
2
â
16
tOSC
1
cycle time
ââ
2000.0 ns
Subclock oscillation fW
frequency
X1, X2
â 32.768 â
kHz
Watch clock (ÏW)
tW
cycle time
X1, X2
â 30.5 â
µs
Subclock (ÏSUB) cycle tsubcyc
2â
8
tW
2
time
Instruction cycle time
Oscillation
trc
stabilization time
(crystal oscillator)
2â
OSC1, OSC2 â â
â
40.0
tcyc
tsubcyc
ms
Oscillation
trc
stabilization time
X1, X2
ââ
2.0 s
External clock high tCPH
width
OSC1
40.0 â
â
ns
Figure 14.1
External clock low
tCPL
width
OSC1
40.0 â
â
ns
Figure 14.1
External clock rise tCPr
time
ââ
15.0 ns
Figure 14.1
External clock fall
tCPf
time
ââ
15.0 ns
Figure 14.1
Pin RES low width tREL
RES
10 â
â
tcyc
Figure 14.2
Notes: 1. A frequency between 1 MHz to 10 MHz is required when an external clock is input.
2. Selected with SA1 and SA0 of system control register 2 (SYSCR2).
436
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